发明名称 Complementary integrated circuit device equipped with latch-up preventing means.
摘要 A complementary integrated circuit device is disclosed which includes a semiconductor substrate having a first area in which a plurality of first transistors are formed and a second area in which a plurality of second transistors are formed, each of the first transistors being larger in size than each of the second transistors. A guard ring region is formed in the substrate to surround the first area. The guard ring region is supplied with a power voltage via a first conductor line which is formed separately from a second conductor line supplying the power voltage to each of the first transistors.
申请公布号 EP0283046(A2) 申请公布日期 1988.09.21
申请号 EP19880104392 申请日期 1988.03.18
申请人 NEC CORPORATION 发明人 SUGAWARA, YUKARI
分类号 H01L23/528;H01L27/092 主分类号 H01L23/528
代理机构 代理人
主权项
地址