发明名称 |
Microprogram controller in which instruction following conditional branch instruction is selectively converted to a NOP instruction |
摘要 |
In a microprogram controller by pipeline control which includes a memory for storing a microprogram and a program counter for representing the address of the memory, a microprogram controller includes means for judging whether or not a branch condition of a branch microinstruction is satisfied and means for converting the microinstruction fetched from the memory to a NOP (No Operation) microinstruction from the output of the next step of the memory till the outputs after a plurality of steps by the affirmation output of the judging means. When the affirmation output is obtained from the judging means, part of the memory output is loaded into the program counter and when the negation output is obtained, a value as the sum of a current value plus 1 is loaded into the program counter.
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申请公布号 |
US4773002(A) |
申请公布日期 |
1988.09.20 |
申请号 |
US19860865388 |
申请日期 |
1986.05.21 |
申请人 |
HITACHI, LTD. |
发明人 |
IWASAKI, KAZUHIKO;YAMAGUCHI, NOBORU;FUNABASHI, TSUNEO;TATEZAKI, JUNICHI;SHIMURA, TAKANORI |
分类号 |
G06F9/28;G06F9/22;G06F9/26;(IPC1-7):G06F9/32;G06F9/38 |
主分类号 |
G06F9/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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