发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To enable a sector length to be designated and to attach a serial access function, by supplying a sector address and a sector length signal to a multiplication circuit, and performing the access of a memory cell in series via the output signal of the circuit. CONSTITUTION:A readout mode is decided by fetching the sector address SA and the sector length DL by buffers ADB and DLB at a timing when a chip select signal, the inverse of CS changes from an H to an L, and detecting those by a timing control circuit TC when a write enable signal is set at the H. The multiplication circuit AU multiplies the signal SA by the DL, and sends an address signal AY to a shift register SR via a YDCR, and designates a leading address. Also, an address signal AX from the AU is inputted to an XDCR via an ACOUT, and the selection operation of a word line is performed. Next, a readout signal is sent to an FF by a data timing signal phis. The SR starts a shift operation by a clock signal CK, and outputs a data in series from an input/output circuit IOB synchronizing with the CK.
申请公布号 JPS63225997(A) 申请公布日期 1988.09.20
申请号 JP19870058810 申请日期 1987.03.16
申请人 HITACHI LTD 发明人 NAGASHIMA YASUSHI
分类号 G06F12/02;G06F12/04;G11C11/34;G11C11/401 主分类号 G06F12/02
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