发明名称 Processor
摘要 Computers are formed with different architecture to attain optimum functions or performances according to the usage and objects. For standardization of processors for implementing predetermined operations in accordance with instuctions supplied from an external device of a computer, an interpretation section for converting instructions supplied from the external device into internal instructions is so configured that the conversion method can be modified according to other computers of different architectures. For instance, when bit composition of the external instructions differs, a decode logic in the interpretation section is so configured as to be modified according to change in the bit composition. Further, when function of the external instruction differs, a microprogram storage section is so configured as to be modified according to change in the instruction function. When bit length of the external instructions differs, a bus control section is so configured as to be modified according to change in the instruction bit length.
申请公布号 US4771376(A) 申请公布日期 1988.09.13
申请号 US19860937829 申请日期 1986.12.04
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 KAMIYA, SHIGEO
分类号 G06F9/455;G06F9/22;G06F9/30;G06F9/318;G06F9/38;(IPC1-7):G06F1/00 主分类号 G06F9/455
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