发明名称 FLIP-FLOP CIRCUIT
摘要 PURPOSE:To lower a power source voltage to >=1.5V by constituting a flip-flop of two differential circuits composed of two pairs of transistor pairs to share a constant current source. CONSTITUTION:When a clock pulse is inputted from terminals C and -C and the terminal C is High and the terminal -C is LOW, transistors Q1 and Q2 are turned off. At this time, when a terminal D is High and a terminal -D is LOW, a transistor Q3 is turned on and a transistor Q4 is turned off. Next, the clock pulse of the terminals C and -C is inverted, the terminal -C is High and the terminal C is LOW, then, transistors Q3 and Q4 are turned off and transistors Q5 and Q6 are turned off. At such a time, a transistor Q7 is turned on, a transistor Q8 is turned off and the data inputted from terminal D and -D are held. By the above-mentioned action, it is found that the circuit has the function of the flip-flop.
申请公布号 JPS63220615(A) 申请公布日期 1988.09.13
申请号 JP19870054601 申请日期 1987.03.09
申请人 NEC CORP 发明人 KIMURA KATSUHARU
分类号 H03K3/286 主分类号 H03K3/286
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