发明名称 |
Phase locked loop having a filter with controlled variable bandwidth |
摘要 |
A phase locked loop (PLL) is provided having a filter with a programmable wide and narrow bandwith. When PLL circuit operation is initiated or when the operational frequency of the PLL is changed by a substantial amount, a phase detector functions to force the filter in a wide bandwith mode to allow fast circuit operation in the transient mode. After the PLL output has settled close to a predetermined frequency, the number of times the output frequency varies above and below the predetermined frequency before reaching a locked state is detected and counted. After the output frequency has varied above and below the predetermined frequency a predetermined number of times, the filter is automatically switched to a low bandwith mode to allow the PLL to operate in a stable manner.
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申请公布号 |
US4771249(A) |
申请公布日期 |
1988.09.13 |
申请号 |
US19870053653 |
申请日期 |
1987.05.26 |
申请人 |
MOTOROLA, INC. |
发明人 |
BURCH, KENNETH R.;LITTLE, WENDELL L. |
分类号 |
H03L3/00;H03L7/089;H03L7/107;H03L7/18;(IPC1-7):H03L7/10 |
主分类号 |
H03L3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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