发明名称 CLOCK REPRODUCING CIRCUIT
摘要 PURPOSE:To suppress the frequency fluctuation by providing an integrator holding a voltage corresponding to an output frequency just before the end of a reception burst period and an integrator holding a voltage corresponding to the frequency of the entire period and applying the difference voltage of the output of both integration devices as an offset voltage to the input of a voltage controlled oscillator. CONSTITUTION:When the frequency of the voltage controlled oscillator 2 is fluctuated due to power supply fluctuation or temperature fluctuation, only the output voltage of the integrator 6 changes in response to the frequency fluctuation and the output of an error amplifier 7 outputs the changed voltage and is added to the output voltage of the integrator 4 as the offset voltage by an adder 8. A negative feedback loop is constituted by adding the added voltage to the voltage controlled oscillator 2 and the frequency of the voltage controlled oscillator 2 is changed to make the output of the error amplifier 7 zero, thereby keeping the frequency just before the end of received burst period. Thus, even when temperature fluctuation or power fluctuation exists at the outside of the reception period of the burst signal, the frequency fluctuation is suppressed and the stable clock to keep the frequency just before the end of reception burst period is obtained.
申请公布号 JPS63217844(A) 申请公布日期 1988.09.09
申请号 JP19870051421 申请日期 1987.03.06
申请人 FUJITSU LTD 发明人 YAMASHITA HARUO;SOEJIMA TETSUO;TAKAHASHI MASAAKI;OTA SHINJI
分类号 H04L5/16;H04L7/02;H04L7/033;H04L7/10 主分类号 H04L5/16
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