发明名称 CHROMINANCE SIGNAL CONVERTER
摘要 PURPOSE:To improve the precision of conversion and the conversion speed by providing three frame memories, a lookup table means, three latch means where picture data is latched, and an adder and operating multiplication with the look-up table means and operating addition with the adder. CONSTITUTION:A look-up table in a ROM 24 uses picture data from a latch circuit 20 as an argument to generate picture data whose value is obtained by multiplying the argument by a prescribed coefficient. For example, conversion formulas of YUV RGB are R=Y+1.403V, B=Y+1.773U, and G=1.704Y+(-0.509)R+(-0.194)B. Consequently, a relatively small-capacity memory having 5k-Ward storage capacity is sufficient as the ROM 24. An adder 26 adds picture data from the ROM 24 and the picture data from a latch circuit 22. The multiplication and addition of digital picture data are quickly processed with hardware in this manner to improve the conversion precision as well as the conversion speed.
申请公布号 JPS63207292(A) 申请公布日期 1988.08.26
申请号 JP19870039898 申请日期 1987.02.23
申请人 NEC HOME ELECTRONICS LTD 发明人 TANAKA KAZUYOSHI
分类号 H04N9/74;G06T1/00 主分类号 H04N9/74
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