发明名称 CMOS COUNTER CIRCUIT
摘要 PURPOSE:To output a non-inverting signal and an inverting signal in the same phase by a clock signal of single phase by constituting a dynamic counter circuit of a CMOS to quicken the speed and make the power consumption low. CONSTITUTION:When the level of an input is an L, then an MOS transistor(TR) T1 is turned off and a TRT2 is turned on. As a result, a point C goes to an H level and a T5 is turned off. Further, since the level of the input to a T3 is L, a voltage at a point (d) remains at the preceding level. When the voltage stored at the point (d) is in the L level, then a T8 is turned off and a T7 is turned off. Since a T9 is turned on, a point (e) reaches the H level and a non-inverting output Qn goes to the H level. Then, an output point (f) of inverters T10, T11 goes to the L level. Suppose that the input is changed to the H level, the point (d) goes to the H level and the output level at the points (e) and (f) is unchanged. When the input goes to the L level again, the point (e) goes to the L level and the point (f) is inverted into the H level.
申请公布号 JPS59122128(A) 申请公布日期 1984.07.14
申请号 JP19820228650 申请日期 1982.12.28
申请人 FUJITSU KK 发明人 KIMURA MASAHARU
分类号 H03K23/54;H03K23/60 主分类号 H03K23/54
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