发明名称 |
Systems, apparatuses and methods for determining a trailing least significant masking bit of a writemask register |
摘要 |
<p>A zero mask before trailing (i.e. least significant) zero (KZBTZ) instruction is decoded and executed to find a least significant zero bit position in an first input mask 301 and sets an output mask 302 to have the values of the first input mask, but with all bit positions closer to the most significant bit position than the least significant zero bit position in the first input mask set to zero. In some embodiments, a second input mask 303 is used to determine which bit positions of the first input mask are considered in the least significant zero bit position calculation depending upon there being a 1 in a corresponding bit position in the second input mask. The masks are writemask operands and may be stored in write mask registers or general purpose registers.</p> |
申请公布号 |
GB2513467(A) |
申请公布日期 |
2014.10.29 |
申请号 |
GB20140003993 |
申请日期 |
2014.03.06 |
申请人 |
INTEL CORPORATION |
发明人 |
CHRISTOPHER J HUGHES;MARK J CHARNEY;JESUS CORBAL;MILIND B GIRKAR;ELMOUSTAPHA OULD-AHMED-VALL;BRET L TOLL;ROBERT VALENTINE |
分类号 |
G06F9/30 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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