发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To easily control the saturated drain current of a transistor to have a desired value by making the control of the quantity of recess etching comparatively easy, by forming three layers of a gallium arsenic layer, an aluminum gallium arsenic layer and the gallium arsenic layer on an impurity doped aluminum gallium arsenic layer. CONSTITUTION:In a semiconductor device represented by a transistor which has a hetero junction of aluminum gallium arsenic and gallium arsenic, the three layer structure of an n-type thin aluminum gallium arsenic layer 5 interposed between two n-type gallium arsenic layers 4, 6 on an n-type impurity doped aluminum gallium arsenic layer 3 is formed. This enables realizing the control of the quantity of recess etching comparatively easily without exposing the aluminum gallium arsenic layer near a gate since the aluminum gallium arsenic layer 5 works as a stopper layer against a selective etching liquid and the saturated drain current of a transistor can be restrained to desired value.
申请公布号 JPS63204662(A) 申请公布日期 1988.08.24
申请号 JP19870036956 申请日期 1987.02.19
申请人 NEC CORP 发明人 ISHIUCHI HIROAKI
分类号 H01L29/205;H01L21/338;H01L29/778;H01L29/80;H01L29/812 主分类号 H01L29/205
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