发明名称 RESETTING SYSTEM
摘要 <p>PURPOSE:To surely reset a microprocessor CPU by storing the state of a three point changeover switch in a resetting state and reading a detection signal to compare it with the stored switch state in an interruption state. CONSTITUTION:An information processor consists of a CPU 1, a program ROM, a RAM 3, an internal ROM 4, an external ROM 5 that can be freely attached and detached via connectors 6a-6b, a display drive circuit 7, a display device 8, a key matrix circuit 9 for an input means, a timer circuit 10, a gate circuit 11, a three point changeover slide switch 12, a stabilized power supply circuit 15 containing a DC/DC converter 18, a resetting signal generating circuit 19, and a switch state detecting circuit 20. The CPU 1 supplies a resetting signal R to the CPU 1 as well as a detecting signal S and also supplies the output of the circuit 10 to an NMI (non-maskable interruption) terminal for application of an interruption. As a result, the CPU 1 is surely reset when a memory circuit is switched.</p>
申请公布号 JPS63200219(A) 申请公布日期 1988.08.18
申请号 JP19870032812 申请日期 1987.02.16
申请人 SANYO ELECTRIC CO LTD 发明人 MIYOSHI OSAMU
分类号 G06F1/24;G06F1/00;G06F9/06;G06F15/78 主分类号 G06F1/24
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