发明名称 INTEGRATED CIRCUIT
摘要 PURPOSE:To reduce a wiring region and to easily execute a performance test by a method wherein signals between individual function blocks are transmitted in the form of parallel signals at an integrated circuit which is designed to be hierarchical. CONSTITUTION:At function blocks 1-6, parallel output signals comprising, e.g., 3 bits are output after they have been converted into serial output signals; at the same time, serial input signals which have been transmitted are acquired in after they have been converted into parallel input signals comprising 3 bits. At the individual function blocks 1-6, input/output ports 7 are installed for this purpose; input/output signals comprising, e.g., 3 bits can be transmitted by the input/output ports 7 via a single signal line. Because the input/output signals comprising, e.g., 3 bits are transmitted via the single signal line in this manner, a wiring region 8 which is indicated by oblique hatching lines can be reduced. In addition, because a test data can be input/output in the form of a serial data, the wiring volume is not increased sharply even when a test is executed by a block isolation method.
申请公布号 JPS63198366(A) 申请公布日期 1988.08.17
申请号 JP19870030728 申请日期 1987.02.13
申请人 SONY CORP 发明人 SHIMIZUME KAZUTOSHI;ONODERA TAKASHI
分类号 H01L21/66;G01R31/28;H01L21/822;H01L27/04 主分类号 H01L21/66
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