| 摘要 |
PURPOSE:To obtain a performance of low loss at reception by using 1st and 2nd inductor lines so as to connect each drain and source electrode of the 1st and 2nd field effect transistors (TR) respectively so as to attain large power, low loss and high isolation, at large power reception at transmission and preventing deterioration and damage of the FET. CONSTITUTION:Drains 7, 12 and sources 8, 13 of a 1st FET (field effect TR) 6 connected in series with 1st and 3rd input/output lines 3, 5 and a 2nd FET 11 connected in parallel with a 2nd input/output line 4 are connected by the same shape of inductor lines 27, 28 respectively. Thus, even when a low impedance FET is in use with a large gate width, the inductor lines 27, 28 connected between the drain and source and the FET capacitance are in parallel resonance. Thus, low loss and high isolation performance is obtained by the reception state switch.
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