发明名称 FRAME SYNCHRONIZING SYSTEM
摘要 <p>PURPOSE:To attain the decoding of a reception data even when a reception data is missing for a short time by using the count of an internal clock during the missing of the reception data so as to ensure the synchronizing state and making the count of the internal clock coincident with the count of a recovered data clock when the data is received normally. CONSTITUTION:When the information for synchronizing control is received, both counts of an internal clock counter 105 and a data clock counter 103 are made correspondent and stuff/destuffing is applied in frame synchronizing control means 109 in response to the data clock to attain frame synchronization. When a missing is generated in the received data, the stuff/destuff of the data clock is applied in a frame synchronizing control means 109 so that the count of the internal clock counter 105 is made coincident with the count of the data clock counter 103. Thus, the frame synchronization is applied easily.</p>
申请公布号 JPS63197137(A) 申请公布日期 1988.08.16
申请号 JP19870030203 申请日期 1987.02.12
申请人 FUJITSU LTD 发明人 KANEKO YOSHIAKI
分类号 H04J3/06;H04L7/08 主分类号 H04J3/06
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