发明名称 LSI TESTING APPARATUS
摘要 PURPOSE:To efficiently test the function of a highly function device such as a video memory having a serial input/output function, by making it possible to generate a serial input address or a serial expectation value. CONSTITUTION:The address outputs of an algorithmic pattern generator ALPG 11 are converted to serial data by a parallel/serial converter 12. The conversion of the merged serial data of X, Y and Z addresses is performed by a recombination device 13 arbitrarily rearranging said address outputs and the input address of a device 10 to be tested is generated. The writing data outputted from ALPG 11 is given to the device 10 to be tasted on the basis of the take-in clock signal from a timing generation 17 and, at every writing data, said data is written in a pattern memory 20 as expectation value data and converted to a serial pattern by a parallel/serial converter 21 at the time of reading of the memory to be compared with memory output data as the expectation value data by a comparator 24.
申请公布号 JPS63191078(A) 申请公布日期 1988.08.08
申请号 JP19870021717 申请日期 1987.02.03
申请人 HITACHI LTD 发明人 YAMAGUCHI KAZUO
分类号 G01R31/28;G01R31/3183;G11C29/00;G11C29/22;G11C29/56 主分类号 G01R31/28
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