| 摘要 |
PURPOSE:To omit a communication means for instruction of total invalidation as well as a mechanism for total invalidation, by invalidating only the corresponding entry at every detection that the same address is included in plural ways without performing the total invalidation of a copy contained in a buffer invalidation processing mechanism. CONSTITUTION:A multi-processing system contains a buffer invalidation processing mechanism 17 which holds a copy tag 18 of a tag 13 of a buffer of each processor and decides whether the write request address given from another processor is included or not in the buffer of each processor to invalidate the address corresponding to its own buffer only when said request address is included in the buffer. In such a constitution, the copy tag 18 of the mechanism 17 is never invalidated for processing even though the buffers of a certain processor are all invalidated. A means is provided to detect such a case where the plural ways produce the coincidences at a time. When the coincidence is obtained at a detecting time point, the entry of each way corresponding at the relevant time point is invalidated within the mechanism 17. Thus a buffer invalidating job is smoothly carried out.
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