| 摘要 |
PURPOSE:To trace and display the state of an I/O port designated for each bus cycle with the minimum extension of the trace memory bit width, by extracting only a fixed number of port data requiring the trace and performing a tracing job. CONSTITUTION:The data on the bus lines Ba-Bd which are connected to a target system from I/O ports Pa-Pd of a microprocessor 1 loaded in an in- circuit emulator are individually latched by data latches 3a-3d. Then a RAM 6 storing a code for selection of I/O port bit is latched and scanned in a fixed cycle for read-out of an I/O port bit selection code. The I/O port bits are extracted one by one out of the port data latched by said selection code and fetched by a shift register 9. Thus the port data equivalent to plural bits are extracted before the next cycle. In such a way, the optional designated I/O port data can be traced with a delay of a single bus cycle.
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