发明名称 ARITHMETIC CIRCUIT
摘要 PURPOSE:To improve the flexibility and expandability of gate efficiency and circuit constitution, by distributing a result obtained by finding a result by multiplying a picture element data by an appropriate numeric value with a selector, or introducing it to an appropriate output, and obtaining a desired computed result by integrating the output of the selector at an integration part. CONSTITUTION:An arithmetic circuit, after finding the result in which the picture element data is multiplied by the appropriate numeric value, distributes the result appropriately with the selector 2, or introduces it to the appropriate output, and integrates the output of the selector 2 at the integration part 3, then, obtains the desired computed result. In other words, based on the fact that an operation for spatial sum/product calculation or a spatial filter, etc., used in an image processing is provided with isotropy and symmetric property in general, an input to the integration part 3 is performed by allocating and distributing a multiplied result simply by the selector 2. Therefore, it is possible to constitute a multiplication part 1 which has a large number of gates with a necessary minimum components. In such a way, it is possible to realize high gate efficiency and the flexibility and expandability of the circuit constitution.
申请公布号 JPS63187373(A) 申请公布日期 1988.08.02
申请号 JP19870019458 申请日期 1987.01.29
申请人 IIZERU:KK;KUMAGAI RYOHEI 发明人 KUMAGAI RYOHEI
分类号 G06T1/20;G06T5/20 主分类号 G06T1/20
代理机构 代理人
主权项
地址