| 摘要 |
PURPOSE:To realize miniaturization of the titled amplifier without deteriorating a noise characteristic, by providing a resistance between a gate terminal and a gate bias terminal, as a bias circuit for applying a bias voltage to the gate terminal of an FET placed in the post-stage of the amplifier. CONSTITUTION:A resistance 32 is connected between a connecting point of an input matching circuit 11 and a gate terminal 6 of an FET 5, and a gate bias terminal 26, and constitutes a bias circuit 30. In general, between a gate terminal and a source terminal of the FET, a capacitor is formed, therefore, a part between both said terminals becomes open as DC. Therefore, a bias voltage applied from the terminal 26 is applied to the terminal 6 as it is. Also, by selecting large a value of the resistance 32, the impedance which has viewed the circuit 30 side from said connecting point can be increased, therefore, the circuit 30 has almost the same operation as the bias circuit constituted of a conventional distributed constant line and the capacitor.
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