发明名称 CACHE MEMORY DEVICE
摘要 PURPOSE:To omit a tag memory circuit and to eliminate such a case where the data must be written into a main memory as soon as the data are written into a memory circuit, by storing a partial higher rank of a stack into the memory circuit and limiting the data to the stack. CONSTITUTION:A memory circuit 1 stores a higher rank part of the stack type data. When an address 4 of the data to receive an access is received, a lower rank offset part 5 gives an access to the circuit 1. At the same time, a comparator 6 compares the address 4 with pointers 2 and 3. Then a valid signal 7 is delivered if the address 4 is set between both pointers 2 and 3 and a switch 8 conducts to perform the reading/writing jobs. When no signal 7 is delivered, the switch 8 never conducts and a bus control circuit 9 delivers a bus control signal 10 to give an access to a main memory via the address 4. When data are stored and the difference between the pointers 2 and 3 exceeds the specific value, a write request signal 12 is delivered and the data on the circuit 1 are saved by the main memory.
申请公布号 JPS63182756(A) 申请公布日期 1988.07.28
申请号 JP19870014527 申请日期 1987.01.23
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MIYAKE JIRO
分类号 G06F12/08 主分类号 G06F12/08
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