发明名称 Circuit for computing the quantized coefficient discrete cosine transform of digital signal samples.
摘要 The circuit consists of two parallel branches which perform multiplication and accumulation operations for the even and odd lines of the transform coefficient matrix. Each branch includes: an input circuit (SEM1, SOT1) whereby the contributions of the opposing index columns of the matrix may be added ; a multiplication circuit (ERM, ORM) which performs multiplication for each matrix column by means of an addition and shifting operation for each matrix coefficient; and accumulation circuit for the intermediate products of each matrix column (Figure 1).
申请公布号 EP0275979(A2) 申请公布日期 1988.07.27
申请号 EP19880100692 申请日期 1988.01.19
申请人 CSELT CENTRO STUDI E LABORATORI TELECOMUNICAZIONI S.P.A. 发明人 RIOLFO, BENEDETTO
分类号 G06F7/52;G06F17/14 主分类号 G06F7/52
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