发明名称 PROGRAMABLE LOGIC ARRAY
摘要 PURPOSE:To realize a desirable logic without a decoding circuit by providing an AND plane which can obtain a desirable AND without decoding circuits which generates the forward and backward signal of an input signal and providing an OR plane which can obtain a desirable OR by inputting the output from the AND plane. CONSTITUTION:If an input signal 11 is L, a P channel transistor 14 is in an ON-state and a product term line 12 is L. At this time, an N channel transistor 15 is in an OFF-state and the product term line 13 is H. Meanwhile, if the input signal 11 is H, the N channel transistor 15 is in the ON-state and the product term line 13 is L. At this time the P channel transistor 14 is in the OFF-state and the product term line 12 is H. By combining the basic circuits, the AND plane which can realize the desirable AND can be constituted without an input decoder.
申请公布号 JPS63181527(A) 申请公布日期 1988.07.26
申请号 JP19870012473 申请日期 1987.01.23
申请人 TOSHIBA CORP 发明人 KUROSAWA SACHIKO
分类号 H03K19/177 主分类号 H03K19/177
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