发明名称 CLOCK STROBE CIRCUIT
摘要 PURPOSE:To decrease the average power consumption of an entire circuit by dividing a CMOS logic circuit into an operating area and an idle area, and supplying a clock only to the operating area. CONSTITUTION:A microcode (a) of the operating hardware area designation field in a microcode ROM 1 is decoded by a decoder 2 and latched in a status register 3. The supply oil the clock (b) to logic circuit areas 51-5N is disconnected dynamically respectively by clock gates 41-4N based on the status. Thus, area clocks d1-dN are supplied only to logic circuit areas 51-5N which are in operation and whose operation is started, and the input of the area clocks d1-dN is disconnected to the other logic circuit areas 51-5N in the idle state to freeze the operation of the internal logic.
申请公布号 JPS63178620(A) 申请公布日期 1988.07.22
申请号 JP19870010315 申请日期 1987.01.19
申请人 NEC CORP 发明人 KIMURA KOICHI
分类号 H03K19/00;H03K19/0948 主分类号 H03K19/00
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