发明名称 DETECTING CIRCUIT FOR DUTY CYCLE OF SIGNAL
摘要 PURPOSE:To discriminate an abnormal part of a signal by providing a 2nd retriggerable multivibrator set to have the time constant slightly longer than the longest time length in the range of change of the time length of one period of the signal when the signal being an object of the detection of duty cycle is normal. CONSTITUTION:A pulse Pb (discrimination signal) having a prescribed pulse width To is generated at a time ta or tb when the pulse P3 changes from the high level state into the low level state from a pulse expanding circuit PS receiving the pulse P3 outputted from the 2nd retriggerable multivibrator RTMM2 during a period being shorter than the time constant T2 set to a 1st retriggerable multivibrator RTMM1 such as a time from time t5 to a time t6 and sent to an output terminal 2. If a signal missing part or a discontinuous phase of the signal exists in the signal Si being an object of the detection of the duty cycle supplied to the input terminal 1, then a discrimination signal Pb is sent to the output terminal 2.
申请公布号 JPS63176014(A) 申请公布日期 1988.07.20
申请号 JP19870007729 申请日期 1987.01.16
申请人 VICTOR CO OF JAPAN LTD 发明人 HAYAKAWA MITSURU;IBARAKI KOJI
分类号 H03K5/19 主分类号 H03K5/19
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