| 摘要 |
PURPOSE:To store the high-speed data with a frame memory through jumping storage by using a 1/8 divider circuit, an address generator, a frame counter and a memory timing control circuit. CONSTITUTION:The picture element data is written and stored into a memory at and after a picture element #1 in 8-picture element steps at the time of a 1st main scan. Then the picture element data is stored at and after a picture memory #2 in 8-picture element steps at the time of the next main scan and at and after a picture element #8 in 8-picture element steps at the time of the final 8th main scan. Therefore the vertical synchronizing signals 10 are counted by a frame counter 33. Based on this count value, a 1/8 divider circuit 36 changes the phase of the horizontal synchronizing signal 29 to divide it into 1/8 clock 38. An address generator 40 produces the address of a frame memory 39 and a memory timing control circuit 43 produces the write/read timing together with the fresh control. |
