发明名称 GAAS LOGICAL INTEGRATED CIRCUIT
摘要 PURPOSE:To improve a noise margin by specifying the relation between transistors for driver and load in terms of width and length of respective gates. CONSTITUTION:Transistors for driver, load, and power source Q1, Q2, and Q3 are made up by the same system; that is, a D-type MESFET. A Schottky diode SD for level shift is provided in series at a gate of the transistor Q1 for driver by having a homopolar relation to a junction between gate and source. Further, a relation of a gate width and length WD and LD of the transistor Q1 for driver to that WL and LL of the transistor Q2 for load is established so that the above relation may satisfy the following condition; WD/LD<WL/LL. In this way, the electric current balance between transistors for driver and load which is caused in the case where threshold of DFET (normally ON type FET) is shallowly set up specially so as to realize a less electricity consumption power supply is improved and a high noise margin is obtained.
申请公布号 JPS63169075(A) 申请公布日期 1988.07.13
申请号 JP19870000065 申请日期 1987.01.05
申请人 AGENCY OF IND SCIENCE & TECHNOL 发明人 KAMEYAMA ATSUSHI;KAWAHISA KATSUE;SASAKI TADAHIRO;IGAWA YASUO
分类号 H03K19/0952;H01L27/06;H01L27/095;H01L29/80;H03K19/094;H03K19/0944;H03K19/0956 主分类号 H03K19/0952
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