| 摘要 |
PURPOSE:To improve an operating speed by accumulating the high-order bit of input data in a first addition part and the low-order bit part in a second addition part, processing the carry output of the first and the second addition parts in a third addition part, and processing the carry output at the time of completing the accumulation in a fourth addition part. CONSTITUTION:Data obtained by shifting the output of the first addition part 10 downward by one bit and the carry output of the third addition part 12 are inputted to the first addition part 10 to add these data and the high-order part of divided input data and data obtained by adding the output of the third addition part 12 to the most significant bit of data obtained by shifting the output data of the second addition part 11 downward by one bit is inputted to the second addition part 11 to add this data and the low-order part data of the inputted divided data. Thereby, the accumulation of data in which the input data is dislocated by one bit of the high-order with respect to the preceding input data can be executed at high speed. |
