发明名称 MEMORY MONITORING SYSTEM
摘要 <p>PURPOSE:To test all cells of a storage circuit by collating a monitor pattern with the monitor pattern restored by a restoring means to detect the trouble of a storage means. CONSTITUTION:A pattern input a-p is added to data inputs a-1-a-n to a temporary storage circuit 3, and all bits of them are successively switched by a space switch 2 and are written in the temporary storage circuit 3. Data written in the temporary storage circuit 3 is read out and is restored to data outputs b-1-b-n and a pattern output b-p by a space switch 4. The pattern input a-p and the pattern output b-p are collated with each other to detect the trouble of the temporary storage circuit 3. Thus, all cells of the temporary storage circuit 3 are tested without having an influence upon the time slot switching operation of data.</p>
申请公布号 JPS63163556(A) 申请公布日期 1988.07.07
申请号 JP19860315738 申请日期 1986.12.24
申请人 NEC CORP 发明人 KABAYA EIICHI
分类号 G06F12/16 主分类号 G06F12/16
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