发明名称 Memory control circuit permitting microcomputer system to utilize static and dynamic rams
摘要 A memory accessing control for a microcomputer system is compatible with both static and dynamic type memories. A gating circuit is responsive to read/write and address latch enable control signals of a microprocessor, and provides an enable signal utilized to generate a chip enable signal compatible with the timing and control requirements of both dynamic and static memories.
申请公布号 US4755964(A) 申请公布日期 1988.07.05
申请号 US19850725019 申请日期 1985.04.19
申请人 AMERICAN TELEPHONE AND TELEGRAPH COMPANY;AT&T BELL LABORATORIES 发明人 MINER, JEFFREY G.
分类号 G06F12/00;G06F12/02;G06F12/06;G11C8/12;G11C8/18;(IPC1-7):G06F15/00 主分类号 G06F12/00
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