| 摘要 |
PURPOSE:To contrive the improvement of the storage data reliability and the fault allowability by providing the 1st mode extracting a signal of a readout bit line as an external output signal and the 2nd mode extracting an external input signal as the external output signal and supplying a signal of the readout bit line to a write bit line. CONSTITUTION:With a control signal 14 at logical H, an external input signal 12 is fed to a write bit line 11 via a selector 20, a signal of a readout bit line 10 is extracted as an external output signal 13 via an inverter 22 and a selector 21 to realize the 1st mode. With the control signal 14 at logical L next, the external input signal 12 is fed to an external output signal 13 via a selector 21 and a signal of the readout bit line 10 is fed to the write bit line 11 via an inverter 22 and the selector 20 to realize the 2 mode. Thus, the fault allowability and the high reliability of a stored data are provided to a memory circuit where the write bit line of the memory cell and the readout bit line adjacent thereto are connected in common.
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