| 摘要 |
PURPOSE:To reduce an area, to minimize leakage currents and to increase memory capacitance by forming a first conductivity type semiconductor region having impurity concentration larger than a semiconductor substrate constituting a P-N junction with a source region and introducing a second conductivity type impurity into a region, in which an inversion layer is shaped, and which is the section of the semiconductor region brought into contact with a gate insulating film. CONSTITUTION:A P-type semiconductor region 40a is exposed on the N-type semiconductor region 50 side in a section between an N-type semiconductor region 50 in the surface of a semiconductor base body and an N-type semiconductor region 60 and brought into contact with a gate oxide film 70, and the impurity concentration of the region 40a is larger than that of a semiconductor substrate 10. A device is operated at low voltage by implanting a proper quantity of an N-type impurity to a section being in contact with the gate oxide film 70 in the P-type semiconductor region 40a and changing the section into a P-type semiconductor region 41 in low impurity concentration while the effective channel length of a transfer gate is shortened and operation at high speed is also enabled by introducing the N-type impurity to a section 11 being in contact with the gate oxide film 70 of the P-type semiconductor substrate 10. |
