| 摘要 |
PURPOSE:To decrease the consumption of power by causing mutual feeder lines of clock signals for a two-phase charge transfer to be combined by a switching transistor that is controlled with an AND signal of the clock signals. CONSTITUTION:The first and second clock signals phi1 and phi2 are added to terminals 32 and 33 and then, charge and discharge of electricity of gate groups 22 and 23 of a charge transfer are carried out. A switching transistor 2 is connected to a circuit between respective signal feeder lines of the signals phi1 and phi2 and is controlled with an AND signal (output of NAND gate 1) of signals phi1 and phi2. For example, when a transition of the signal phi1 from high level (H) to low level (L) takes place, the charge of the gate group 22 must be discharged. However, the charge is used for electrifying the gate group 23 where a transition from L to H must be performed by causing the transistor 2 to be ON. Then this approach lessens electrical loss due to charge and discharge of the gate groups 22 and 23 and reduces the consumption of power.
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