发明名称 CONDITIONAL ARITHMETIC OPERATION CIRCUIT
摘要 PURPOSE:To quicken the conditional arithmetic calculation with respect to a picture data and an arithmetic object data by making an arithmetic mask data formed by an expansion means equal to number of bits of a picture data. CONSTITUTION:A destination data supplied to a comparator circuit AU and a source data are compared for each word in the unit of picture elements in response to the operation mode set in a drawing mode register DMR. The prescribed bits of the result of comparison are subject to zero expansion or carry expansion into a bit number constituting one picture element based on the arithmetic operation mode condition by a zero expansion section ZE and a carry expansion section CE. The expanded data is selected by selector SEL and an arithmetic mask data is generated in the unit of one word. The conditional arithmetic operation is executed in the unit of words via an arithmetic mask data in a logic calculation circuit LU to which the destination data and the mask data are supplied.
申请公布号 JPS63153683(A) 申请公布日期 1988.06.27
申请号 JP19860298719 申请日期 1986.12.17
申请人 HITACHI LTD 发明人 SATO JUN;YOKOTA YOSHIKAZU
分类号 G06F3/153;G06F3/14;G06T11/00 主分类号 G06F3/153
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