| 摘要 |
PURPOSE:To realize reduction and expansion of a pit aggregate, by nullifying a part of cell at the time of rearranging the cell by an arranging means. CONSTITUTION:A memory cell is divided into n-rows of memory cell blocks B0-Bn-1, and n-number of serial transfer means SR0-SRn-1 are arranged in parallel in the row direction of each memory cell block, and n-number of same row selecting means DR are provided in the memory cell block of each row. A switching means RSW supplies a row address AR or a row address AR+1 adjacent to the row address. At the time of a serial access mode, a transfer means TR connects in series one row of each memory cell block to a corresponding serial transfer means comprehensively, and the arranging means BAC connects the serial transfer means to n-number of serial input/output terminals SIO0-SiOn-1 after rearrangement. In such a way, it is possible to access by the pit aggregate of arbitrary n-rows.
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