| 摘要 |
In a system for exchange of information between a first and a second microprocessor, in which the first microprocessor sends first pulses, the width of which is modulated with first information, to the second microprocessor, and receives second pulses, the width of which is modulated with second information, a circuit arrangement is provided, which receives the first pulses and sends the front edges of the second pulses to the first microprocessor immediately after the front edges of the first pulses. The circuit arrangement preferably includes at least one bistable element for the second pulses, and this bistable element is set by the front edges of the first pulses and reset by an output signal of the second microprocessor, marking the width of the second pulses. <IMAGE>
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