| 摘要 |
PURPOSE:To shorten the scan time of a programmable sequence controller by completing the memory access of one instruction word by two clocks. CONSTITUTION:A sequence program memory 14 and an I/O device 16 are arranged separately from each other, and respective bits are used in division by data busses and address busses so that these memories can be simultaneously read out. The I/O address indicating the number of I/O data of an instruction word is divided into a bit address and a byte address, and the I/O address is stored in the I/O memory 16 so that the byte address is stored in bytes of a first half of the instruction word and the instruction code and the bit address are stored in bytes of the latter. In a first step of memory access, bytes of the first half of the instruction word are latched in a buffer A and are supplied to an address bus 46. Thus, I/O information is already settled when bytes of the latter of the instruction word are latched in a buffer B in a second step of memory access, and execution of a third step is omitted.
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