| 摘要 |
PURPOSE:To realize a multiplication execution time at high speed by providing a ROM data cell which contains the result of operation of a partial product, and an adding means for adding the result of operation of the partial product. CONSTITUTION:The titled multiplier is provided with a ROM data cell 4, a Y decoder 5a, an X decoder 5b, the high-order partial product register 6a, the low-order partial product register 6b, an ALU (arithmetic/logic circuit) 11, a multiplicand store register 12a, a multiplier store register 12c, and a microprogram 13. The high-order partial product register 6a, the low-order partial product register 6b and the ALU 11 constitute an adding means. In this state, multiplication is executed by the addition of the partial product. In such a way, multiplication can be executed at high speed, and also, the execution time can be made constant. |
