| 摘要 |
PURPOSE:To generate a power application detecting signal having a sufficient amplitude and a pulse regardless of the quantity of rate of rise in a power line potential by switching a power application detection signal extracting point from a power line to a ground level depending on the change in the result of discrimination. CONSTITUTION:A discrimination circuit 10 uses a threshold value 2Vth so as to discriminate a power line potential Vcc and outputs a discrimination signal A in response to the result of discrimination from a node N3. On the other hand, a switching signal S outputted from a node N5 in a switching signal generating circuit 15 is given from a switching circuit 13 having a P-channel MOSFET(P-MOST) 24 and an N-channel MOSFET(N-MOST) 25. The circuit 13 connects a node N6 being an extracting point of a reset signal phiE when the signal S is at a level lower than the logic threshold Vt of the CMOS inverter 16 to the power line 1. When the signal S reaches the threshold value Vt or over, the node N6 is connected to the ground level GND through the switching operation. The reset signal phiR is a power application detecting signal.
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