Galois field arithmetic logic unit.

摘要

The present invention relates to a Galois field arithmetic logic unit of a code error check/correct apparatus to be employed when recording/reproducing data on an optical disk. The arithmetic logic unit uses a combination including a parallel multiplication circuitry (1-8) of a primitive element alpha of a Galois field, an EX-OR addition circuitry (10) for the multiplication results, a 0 element decision circuitry (11) for the results of the addition, and registers (16-24) to which the multiplication results are fed back so as to accomplish a parallel computation of a polynomial, thereby enabling a root and an error value of an error location equation to be obtained at a high speed. The arithmetic logic unit develops a remarkable reduction of the amount of computation particularly when the code system has a great code length and the degree of the error location polynomial associated with the long distance code is as high as d = 17.