| 摘要 |
PURPOSE:To shorten the number of steps and to improve a processing speed by combining a state selecting field, a 1st operation and a 2nd operation to execute the operation of a microinstruction. CONSTITUTION:In the case of adding '1' to the value of a register B when the value of a register A is other than negative and subtracting '1' from the value of the register B when the value of the register is negative at the time of existence of both the registers A, B, a flag computing instruction 6 is executed in the n-th step and the contents of the register A is set up in a flag register circuit 10. In the (n+1)th step, a double operation instruction 5 is executed. Then, '+1' operation is executed by the 1st operation field 5b and '-1' operation is executed by the 2nd operation field 5c. When a state selecting field specifies the detection of a negative operation result, the 2nd operation field 5c is specified when the operated result in the n-th step is negative to execute B=B-1. When the operated result in the n-th step is not negative, the 1st operation field 5b is specified and B=B+1 is executed.
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