发明名称 BIT PATTERN DETECTION CIRCUIT
摘要 PURPOSE:To obtain a small-scale bit pattern detection circuit by connecting plural input signals which after to logic 1.0 to a driving circuit and connecting the output from the driving circuit to a voltage division circuit so as to decide whether the output from the voltage division circuit becomes less than a previously specified voltage value in a voltage decision circuit. CONSTITUTION:It is assumed that the input signals are detected, for example, if there are more than two input signals which are logic 1 in the plural input signals 1-m. If it is set that the output level of the voltage decision circuit 51 is inverted with the output voltage of the voltage division circuit 50 in the case where there are more than two input signals as logic 1, it is decided that there are more than two input signals which are logic one with the output from the voltage decision circuit 51. In this case, a bit pattern detection circuit can be constituted with the driving circuits 40-4m, whose number is equal to the number of the input signals, one voltage division circuit 50 and one voltage decision circuit 51, so that the scale of the circuit can be minimized as compared with a former one.
申请公布号 JPS63142732(A) 申请公布日期 1988.06.15
申请号 JP19860290755 申请日期 1986.12.04
申请人 FUJITSU LTD 发明人 GOTODA TAKAO
分类号 H04J3/14 主分类号 H04J3/14
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