| 摘要 |
PURPOSE:To obtain a memory with a few number of selecting lines and suitable for picture processing or the like by providing a pre-decoder in common to each selection dimension and outputting plural bits of designated dimension at the same time. CONSTITUTION:Data are stored discretely at each other 3-bit to a word line in response to number of dimensions. Other data is stored similarly also to each idle bit. Thus, four 2-dimension data are stored onto one word line. I selecting one of the four data by a decoder 32, a gate 72A is opened and a sense amplifier SA72A or the like is connected to an output line L72 or the like. Then a decoder 40 decodes a segment address and gives an output to an exclusive selection line 38, uses dimension selection signals x, y, s to lead the output of a sense amplifier to a data bus 20 through a selection gate 34 of a selection circuit 16 and a transfer gate 36. Through the constitution above, number of selection lines is less, high circuit integration is attained and this memory is suitable for picture processing or the like.
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