发明名称 FORMATION OF WIRING
摘要 PURPOSE:To almost flatten the surface of a semiconductor wiring by a method wherein an etching operation is performed in such a manner that the etching speed on the impurity diffusion part of the semiconductor layer on a semiconductor wiring is made to be higher than that of the other semiconductor layer. CONSTITUTION:A doped polycrystalline Si layer 1 and an Si3N4 layer 2 are coated successively on an Si substrate 6, and a thermal oxide film 3 is formed on the surface of the substrate 6 and the side wall part of the doped polycrystalline Si layer 1. After the Si3N4 layer 2 has been removed by etching, a non-doped polycrystalline Si layer 4 is coated on the whole surface. Then, impurities are diffused into the non-doped polycrystalline Si layer 4 from the upper surface of the doped polycrystalline Si layer 1. Overall etching is performed until the thermal oxide film 3 is exposed. The etching power at this time is 600 W, for example, pressure is 0.1 Torr, and the etching gas used is SF6:50 SCCM and O2:50 SCCM. Impurities are diffused on the protruding part only of a step on the Si layer 4, and as the etching rate on this part is larger than that of the other part, the surface of the semiconductor wiring can be made flat as the etching operation makes progress.
申请公布号 JPS63128645(A) 申请公布日期 1988.06.01
申请号 JP19860274971 申请日期 1986.11.18
申请人 SONY CORP 发明人 OSUGA HIROTO
分类号 H01L21/3205 主分类号 H01L21/3205
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