发明名称 SEMICONDUCTOR MEMORY CONTROLLER
摘要 PURPOSE:To reduce the load of a CPU, and at the same time, to obtain a high speed file memory in a semiconductor device to read or write data synchronizing with a clock by providing the device with a built-in clock generation circuit independent of a higher rank CPU. CONSTITUTION:At the time of reading or writing by controlling a slave memory 200 through the external CPU 1 and a main memory 2, etc., the slave memory 200 is provided with a built-in semiconductor memory controlling device 100. As for this constitution, a command register 111, a selector address register 112, a status register 113, and a buffer address register 114, etc. are provided in the device 100, and these are connected to an internal data bus 110, and the bus 110 is connected to the data bus 210 of a computer system through a bus controller 101. Further, the clock generation circuit 120, connected to a counter 121 in order to read or write the data of the slave memory 200, is provided, and when the circuit 120 is being operated, the CPU 1 is not used.
申请公布号 JPS63127486(A) 申请公布日期 1988.05.31
申请号 JP19860274424 申请日期 1986.11.18
申请人 HITACHI LTD 发明人 HORIGUCHI SHINJI;AOKI MASAKAZU;NAKAGOME YOSHINOBU;IKENAGA SHINICHI;SHIMOHIGASHI KATSUHIRO;NAKAMURA HIDEO;HAGIWARA YOSHIMUNE;NOGUCHI YOSHIKI;HANAWA MAKOTO
分类号 G11C11/41;G11C11/34 主分类号 G11C11/41
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