发明名称 KEY MATRIX CIRCUIT
摘要 PURPOSE:To minimize the number of signal lines necessary to a key detection by connecting electrically one of three contacts of a key in respective pairs of the matrix circuit, removing it as an address line, detecting the signal of the address line and detecting to which of two pairs of the key matrix circuit the depressed key belongs. CONSTITUTION:For example, the key of one row one column of a key matrix 1 is depressed. By depressing the key, a contact (a), a contact (b) and a contact (c) are electrically connected and the signal of a key output circuit 4 is detected to and address detecting circuit 6 and a key detecting circuit 5. By the signal detected by the address detecting circuit 6, the key detecting circuit 5 that the key in the key matrix 1 is depressed down, and next, the key detecting circuit 5 detects that one row one column key is depressed by the signal of the key output circuit 4 transmitted with the key output circuit 4 the contact (b) the contact (a) the key detecting circuit 5 and by the signal to pass through the contact (c).
申请公布号 JPS63123114(A) 申请公布日期 1988.05.26
申请号 JP19860269264 申请日期 1986.11.12
申请人 NEC CORP 发明人 MATSUSHITA TOSHIO
分类号 G06F3/023;H03M11/20;H04M1/26 主分类号 G06F3/023
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