发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PURPOSE:To speed up an access by providing a charge means at a side opposite to the row decoder of row lines, and charging up a row line speedily if the line is selected. CONSTITUTION:When address data A1-An shift and a row line is selected, a control signal phi temporarily goes to a high level, and the potential at a point C goes to a ground potential VS. Thereafter, if the row line is charged up, the potential of the point A reaches a high voltage level comparatively fast, but that of a point B rises only gradually because of the resistor and the stray capacity of the row line. When the potential of the point C exceeds the logical threshold of an inverter circuit 3 through a capacity element C1, the output of the circuit 3 goes to a low level, a P-type MOSFET Tr4 turns on to supply a high voltage from the power source VC to the point B. Therefore, the charge-up of a selected row line is quickly executed, hence the access is speeded up.</p>
申请公布号 JPS63122096(A) 申请公布日期 1988.05.26
申请号 JP19860270136 申请日期 1986.11.12
申请人 NEC CORP 发明人 JINBO TOSHIKATSU
分类号 G11C16/06;G11C17/00 主分类号 G11C16/06
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