| 摘要 |
<p>PURPOSE:To attain self-initializing only with an initializing signal and a clock by providing an input data control circuit in response to the initializing signal and a write address control circuit. CONSTITUTION:When the initializing signal from a terminal 6 is inverted to a low level, an AND gate 18 forming an input data control circuit is closed and input information goes to 0. On the other hand, a logical gate of the write address control circuit 17 in response to a low level initializing signal is controlled and input address signals 2a, 2b... are interrupted and the circuit 17 acts like a binary counter operation counting the clock from a terminal 1. Thus, the self- initializing is attained surely and simply by the initializing input and the clock without using a specific input through the operations above.</p> |
