| 摘要 |
PURPOSE:To realize a high speed associate memory with a large capacity by providing a logic circuit, a current converting circuit converting an output of the logic circuit into a current output and a wired OR circuit giving OR output of outputs of the current conversion circuit. CONSTITUTION:A memory cell M outputs stored information to differential data lines ai, the inverse of ai. The information outputted to the differential data lines is subject to EOR or ENOR logic processing with a retrieved data by a logic circuit 2 and a current output is obtained by a current conversion circuit 3. That is, the logic circuit 2 and the current conversion circuit 3 control so that a current is given or not to the output of the current conversion circuit 3 depending on the coincidence or noncoincidence between the information of the differential data lines ai and the inverse of ai and the retrieved data. In applying wired OR processing to the outputs of the current conversion circuit, all the coincidence or noncoincidence between the retrieved data and the information stored in the memory cell M is detected.
|
