发明名称 BACK-UP METHOD FOR MEMORY
摘要 PURPOSE:To store data without losing the relation of data by outputting a write enable signal after ending the writing cycle of data at the time of detecting the OFF of a power supply during the writing of the data to stop the writing and back up a memory. CONSTITUTION:When an operation level is instantaneously dropped by turning off a main power supply, a power supply ON/OFF detecting part 4 detects the voltage drop and turns a signal 4a from its 'H' level to its 'L' level. When a decoding signal 3a is in the 'L' level, a memory control part 5 receiving the signal 4a turns a chip select signal 5a to the 'L' level. When the signal 3a is in the 'H' level, the control part 5 turns the signal to the 'L' level after turning the signal 3a to the 'L' level. The 'L' level output of the signal 5a is a write enable signal. Once turned to the 'L' level, the signal 5a holds the 'L' level until the signal 4a is turned from the 'L' level to the 'H' level. When if the voltage is dropped on the way of writing operation of the CPU 1 to a memory 2, the operation is transferred to a back-up state after correctly rewriting a series of data in the memory 2.
申请公布号 JPS63116252(A) 申请公布日期 1988.05.20
申请号 JP19860262435 申请日期 1986.11.04
申请人 HITACHI CONSTR MACH CO LTD 发明人 YASUDA HAJIME
分类号 G06F12/16 主分类号 G06F12/16
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